1. Field of Invention
The present invention relates to a liquid crystal display driving circuit. More particularly, the present invention relates to a liquid crystal display driving circuit, verifying apparatus and error tolerance method thereof.
2. Description of Related Art
Low temperature polycrystalline silicon (LTPS) technique is now frequently used to fabricate the thin film transistors (TFT) on a glass substrate inside a liquid crystal display (LCD) panel. However, the driving circuits for driving various pixels, whether the driving circuits are used for scanning or data transmission, have a relatively unstable production yield. In other words, the yield of the driving circuits on the glass substrate is quite variable when the LTPS technique is used to produce the TFT.
FIG. 1 is a block diagram showing the layout of a conventional liquid crystal display driving circuit. The liquid crystal display driving circuit 10 comprises a plurality of serially connected shift registers 102, 104 and 106. To drive various pixels on the LCD panel, a start-up signal (ST) is first transmitted to the shift register 102. After a preset period (in general a clock cycle), the start-up signal will be transmitted from the shift register 102 to the shift register 104. In like manner, the start-up signal will be transmitted from the shift register 104 to the shift register 106 and subsequent shift registers. The various pixels on the LCD panel are driven by the driving lines 112, 114, 116 that are electrically coupled to the output terminal of the shift registers 102, 104 and 106 respectively.
Because the driving circuit 10 is constructed using serially connected shift registers, problem in any one of the shift register may lead to an erroneous propagation of signals in all subsequently connected shift registers. Reliability is further aggravated by the unstable yield in manufacturing the driving circuit 10 using the LTPS technique.
To alleviate some of the problems caused by a low manufacturing yield for the driving circuits, sophisticated error detection circuits are invented. For example, in U.S. Pat. No. 6,467,057, each driving state includes an additional circuit having a complicated design that occupies considerable area. The introduction of such addition circuit not only increases production cost, but also leads to a decrease in the level of device integration. Otherwise, if the level of integration is maintained at the same level, the probability of having current leaks will increase significantly. All these defects add to the disadvantages of using the LTPS technique.
In addition, stuck-at-zero and stuck-at-one at the output terminals of the shift registers 102 to 106 also cause some problems. Although providing additional shift registers connected in parallel such that the outputs from all these shift registers are logically OR together before sending to the next stage is able to eliminate the stuck-at-zero problem, the stuck-at-one problem at the output terminal of the shift registers still persists.